PCB desing V1 is done

This commit is contained in:
Sebastian H. Gabrielli 2021-10-11 17:38:03 +02:00
parent 3ed3e2b201
commit ac6a5d71ab
4 changed files with 22685 additions and 39 deletions

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -1,29 +1,10 @@
update=. 10. okt. 2021 kl. 22.52 +0200 update=ma. 11. okt. 2021 kl. 17.21 +0200
version=1 version=1
last_client=kicad last_client=kicad
[general] [general]
version=1 version=1
RootSch= RootSch=
BoardNm= BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb] [cvpcb]
version=1 version=1
NetIExt=net NetIExt=net
@ -41,3 +22,242 @@ NetFmtName=Pcbnew
SpiceAjustPassiveValues=0 SpiceAjustPassiveValues=0
LabSize=50 LabSize=50
ERC_TestSimilarLabels=1 ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=CustomKeyboardPCB.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.2
TrackWidth2=0.3
TrackWidth3=0.45
TrackWidth4=0.5
TrackWidth5=0.55
TrackWidth6=0.6
TrackWidth7=0.65
TrackWidth8=0.7
TrackWidth9=0.75
TrackWidth10=1
TrackWidth11=1.25
TrackWidth12=1.5
TrackWidth13=1.75
TrackWidth14=2
TrackWidth15=2.25
TrackWidth16=2.5
ViaDiameter1=0.4
ViaDrill1=0.3
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.127
TrackWidth=0.2
ViaDiameter=0.4
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

View File

@ -424,29 +424,25 @@ C3
Text Label 7600 2200 0 50 ~ 0 Text Label 7600 2200 0 50 ~ 0
C4 C4
Text Label 7600 2300 0 50 ~ 0 Text Label 7600 2300 0 50 ~ 0
C5
Text Label 7600 2400 0 50 ~ 0
C6
Text Label 7600 2500 0 50 ~ 0
C7
Text Label 7600 2600 0 50 ~ 0
C8
Text Label 7600 2800 0 50 ~ 0
C9
Text Label 7600 2900 0 50 ~ 0
C10
Text Label 7600 3100 0 50 ~ 0
C11
Text Label 7600 3200 0 50 ~ 0
C12 C12
Text Label 7600 3300 0 50 ~ 0 Text Label 7600 2400 0 50 ~ 0
C13 C13
Text Label 7600 3400 0 50 ~ 0 Text Label 7600 2500 0 50 ~ 0
C14 C14
Text Label 7600 3500 0 50 ~ 0 Text Label 7600 2600 0 50 ~ 0
C5
Text Label 7600 2800 0 50 ~ 0
C15 C15
Text Label 7600 3600 0 50 ~ 0 Text Label 7600 2900 0 50 ~ 0
C16 C16
Text Label 7600 3100 0 50 ~ 0
C6
Text Label 7600 3200 0 50 ~ 0
C7
Text Label 7600 3400 0 50 ~ 0
C9
Text Label 7600 3500 0 50 ~ 0
C11
Wire Wire Line Wire Wire Line
7550 1900 7750 1900 7550 1900 7750 1900
Wire Wire Line Wire Wire Line
@ -534,4 +530,12 @@ Wire Bus Line
7850 3600 7850 4300 7850 3600 7850 4300
Wire Bus Line Wire Bus Line
7850 1800 7850 3500 7850 1800 7850 3500
Text Label 6200 2900 0 50 ~ 0
D+
Text Label 6200 3000 0 50 ~ 0
D-
Text Label 7600 3600 0 50 ~ 0
C10
Text Label 7600 3300 0 50 ~ 0
C8
$EndSCHEMATC $EndSCHEMATC